1. Field of the Invention
The present invention relates to a method of manufacturing a light generating device and a light generating device manufactured through the method, more specifically to a method of manufacturing a semiconductor light generating device and a light generating device manufactured through the method.
2. Discussion of the Background
In general, a light generating device such as a light emitting diode (LED) has merits such as high efficiency, long lifetime, a low power consumption, eco friendliness, etc., so that the light generating device is employed in various fields.
The light generating device may be divided into two types of a lateral type and a vertical type according to a shape. According to the lateral type light generating device, an n-type semiconductor layer is formed on a substrate, and a quantum well layer (or active layer) and a p-type semiconductor layer are formed in sequence. Then, a portion of the p-type semiconductor layer and the quantum well layer is removed to expose the n-type semiconductor layer, and a p-type electrode is formed on the p-type semiconductor layer and an n-type electrode is formed on an exposed region of the n-type semiconductor layer.
The vertical type LED (or VLED) has merits such as effective heat dissipation, high electro optical characteristics to appeal, but still it is essential to enhance to light extracting efficiency for high efficiency VLED for a lighting apparatus.
The external quantum efficiency of LED is determined by multiplying internal quantum efficiency with light extracting efficiency, and the internal quantum efficiency is determined by current injection efficiency. Therefore, in order to enhance efficiency of LED, effective current distribution from an electrode to a semiconductor layer and effective injection of carrier to a quantum well layer are required.
FIG. 1 is a cross-sectional view showing a conventional light generating device.
Referring to FIG. 1, the conventional light generating device 100 includes a p-type electrode 120 formed on a substrate 110 of metal, a semiconductor stacking structure 130 formed on the p-type electrode 120, a graphene layer 140 formed on the semiconductor stacking structure 130 and an n-type electrode 150 formed on the graphene layer 140. The semiconductor stacking structure 130 includes a p-type semiconductor layer 131, an n-type semiconductor structure 133 and an active layer 132 disposed between the p-type semiconductor layer 131 and the n-type semiconductor structure 133.
When a plus voltage is applied to the substrate 110 and a minus voltage is applied to the n-type electrode 150, the light generating device 110 operates.
In this case, the currents applied to the n-type electrode 150 is distributed uniformly through the graphene layer 140 so that electrons are applied to the active layer 132, and the p-type semiconductor layer 131 provides the active layer 132 with holes so that holes combine with the electrons to generate light. In order to uniformly distribute current to the n-type semiconductor layer 133, ITO, which is optically transparent and electrically conductive, is previously used but graphene that is superior to ITO in electrical and optical characteristics is developed and applied to the light generating device 100.
FIG. 2A through FIG. 2E are cross-sectional views showing a process of manufacturing the conventional light generating device in FIG. 1.
In order to manufacture the light generating device 100 in FIG. 1, a metal thin film M including nickel (Ni) or copper (Cu) is formed on a silicon oxide (SiO2) substrate S as shown in FIG. 2A, and a graphene layer G is formed on the metal shin film M by using chemical vapor deposition (CVD) method as shown in FIG. 2B. This process is formed at a temperature of about 1000° C. Nickel or copper breaks carbon bond so that a graphene single layer or graphene multi-layer is formed according to process condition.
Then, a PMMA layer P is formed on the graphene layer G through a spin coating method as shown in FIG. 2C, and the metal thin film M is corroded by using etchant so that the graphene layer G with the PMMA layer P is separated from the substrate S as shown in FIG. 2D.
Then, the graphene layer G that is separated from the substrate S is attached to the n-type semiconductor layer 133 and the PMMA layer P is removed as shown in FIG. 2E.
On the other hand, when light generated by the active layer 132 exits outside, a portion of the light is totally reflected and absorbed to induce light loss due to refractive index difference between air and the semiconductor material. In order to prevent total reflection, a roughness is formed on a top surface of the n-type semiconductor layer 133. However, when the roughness is formed on the top surface of the n-type semiconductor layer 133, the graphene layer G cannot strongly attached to the n-type semiconductor layer 133 when the graphene layer G is attached to the to the n-type semiconductor layer 133 through transferring method described above. When the graphene layer is directly formed on the n-type semiconductor layer 133 through CVD, high temperature process of about 1000° C. is required so that the semiconductor stacking structure 130 is damaged.
Therefore, other method is required in order to solve above problems.